Patterning a relatively thick first layer, such as silicon nitride, which coats a relatively thin second layer, such as silicon dioxide, which in turn coats a major surface of a wafer substrate body, such as silicon, is useful in the art of semiconductor integrated circuit fabrication. For example, in the fabrication of integrated circuits comprising metal oxide semiconductor (MOS) transistors integrated in a silicon semiconductor wafer body, a silicon nitride layer which has been patterned with apertures is often used to define the gate and source and drain (GASAD) regions of the transistors to be fabricated. For this purpose, the apertures in the nitride layer must penetrate all the way down to the silicon dioxide layer, and in some applications the apertures should also penetrate a finite distance through the silicon dioxide layer. This nitride layer is deposited--typically either by low pressure chemical vapor deposition (LPCVD) or by plasma deposition--upon a layer of silicon dioxide located on a major surface of the silicon body. The silicon dioxide layer, called "pad oxide", ordinarily has a thickness which is much smaller than that of the silicon nitride layer, typically by a factor of at least about six. For example, the pad oxide layer is ordinarily less than about 400 Angstroms thick, typically about 125 to 175 Angstroms thick; whereas the nitride layer is typically about 1,200 Angstroms thick. To pattern the nitride layer with apertures, the nitride layer is first coated with a protective masking layer of etch resistant material--typically a photosensitive resist ("photoresist") material--and this masking layer is then patterned with apertures in accordance with the complement of the ultimately desired pattern of the transistor GASAD regions. A typical width w of the apertures is about 3 microns or less. The silicon nitride layer typically is then patterned with apertures by subjecting the nitride layer to a reactive ion etching plasma at a time when the nitride layer is coated with the thus patterned masking layer. Advantageously, the reactive ion etching of the silicon nitride layer is anisotropic; that is, the etching produces apertures that have essentially vertical sidewalls in the nitride layer. After the nitride layer has thus been patterned by means of the reactive ion etching process, the silicon body is subjected to a thermal growth treatment suitable for the growth of a relatively thick silicon dioxide layer--typically 9,000 Angstroms thick--in the regions where the nitride has been removed in the reactive ion etching step. This relatively thick silicon dioxide layer then serves as the "field oxide" layer. Note that the edges of this field oxide layer are contiguous with the edges of the transistor GASAD regions.
Because the pad oxide layer is much thinner than the silicon nitride layer, and because the conventional etching procedure removes oxide at a rate undesirably not sufficiently different from the rate it removes nitride, therefore, when etching the apertures in the nitride layer completely through to the pad oxide, it is very difficult to prevent the complete penetration of the relatively thin pad oxide. Consequently, during this conventional etching procedure, the top surface of the underlying silicon wafer is exposed to the etching plasma in regions underlying the apertures in the nitride layer, whereby the surface of the silicon wafer is undesirably etched thereat. This consequent etching of silicon can cause significant damage, and such damage can produce lattice defects (such as stacking faults) during subsequent thermal oxidation to grow the field oxide; in turn, these lattice defects can cause undesirable degradation in the performance of the integrated circuits that are subsequently fabricated. For instance, a degradation of the hold time of memory devices has been attributed to such stacking faults. On the other hand, it is necessary to etch at least some thickness of the pad oxide during the etching of the nitride in order to ensure that the entire thickness of the nitride layer underlying the apertures is removed, otherwise the subsequent thermal growth of field oxide would undesirably be impaired.
The reactive ion etching of the nitride is ordinarily performed in the etching chamber of an etching machine wherein a plurality of semiconductor wafers are simultaneously subjected to the etching process, a process having nonuniform etch rates, i.e., differing etching removal rates for different wafers, owing to the differing locations of the various wafers in the chamber of the etching machine. Although such nonuniformity of etch rates can be somewhat reduced by, for instance, elevating the ground plane in a conventional multifaceted etching chamber, commonly called a "Hex machine", nevertheless some nonuniformity undesirably persists. Thus, it is not feasible to adjust the length of time of the etching process so that the entire thicknesses of the nitride layers in all the wafers are removed at all regions underlying the apertures in the protective masks while ensuring at the same time that no underlying silicon in any wafer is also exposed and etched. Accordingly, it would be desirable to have an etching process which completely removes the nitride layer in regions underlying the apertures of the protective mask but at the same time which does not penetrate all the way through the silicon dioxide layer to expose the silicon.
On the other hand, reactive ion etchants which would desirably etch the silicon dioxide layer at a much slower rate than the silicon nitride layer, and hence would desirably avoid etching through the silicon dioxide layer, would also undesirably quickly etch the masking layer and hence could not be used without undesirably widening the apertures through most of, or even all of, the thickness of the nitride layer. Thus, linewidth control would be lost in using such an approach to prevent etching through the silicon dioxide layer. Yet such reactive ion etchants are otherwise desirable for etching through all of the silicon nitride layer without etching through all of the silicon dioxide layer. Moreover, even in the presence of unavoidable etching and consequent lateral erosion of the masking layer which may occur at a faster rate than the etching rate of either the first (silicon nitride) layer or the second (silicon dioxide) layer or both, it is important that any widening of the apertures in the nitride layer--i.e., any loss of linewidth control--should be kept relatively small in comparison with the width w of the apertures, that is, should be kept less than about 0.1 microns (1,000 Angstroms), a distance which typically is also less than the thickness of the nitride layer. Thus, the use of a masking layer which is etched faster than the nitride layer would seem to be precluded, and thus the choice of a suitable masking layer would seem to be extremely limited. Thus, it would be desirable to have a method for etching the apertures in the nitride layer using a masking layer that etches at a faster rate than the nitride layer. More generally, it is desirable to have a method for similarly patterning with apertures a relatively thick layer of material other than silicon nitride--such as polycrystalline silicon--whereby the apertures penetrate through this thick layer but not through an underlying relatively thin layer underlying this relatively thick layer.